Signal train verification system using landmarks

ABSTRACT

When trains of signals, derived from a written template signature, are to be compared directly with trains of signals, derived from a written specimen signature, because no two written signatures are identical, there is a requirement for providing a certain degree of &#34;rubberiness&#34; between the specimen and template signals. Previously, such rubberiness was achieved by breaking up the trains of signals into fixed portions and then conducting translation, stretch and contraction between these fixed portions in the course of the comparison. In this invention, advantage is taken of the existence of prominent landmarks in the trains of signals of the template and specimen signatures. The trains of signals are broken into segments by these landmarks. Segments of the specimen are stretched or contracted and translated to match corresponding segments of the template, to greatly simplify and enhance correlation process.

CROSS-REFERENCE TO OTHER APPLICATIONS

This application is a continuation-in-part of application Ser. No.716,344, filed on Aug. 20, 1976, now U.S. Pat. No. 4,086,567.

BACKGROUND OF THE INVENTION

This invention relates to systems used for signature verification andmore particularly to improvements therein. In an application, Ser. No.681,118, now U.S. Pat. No. 4,040,012, entitled Handwriting VerificationSystem, by Crane et al, and assigned to a common assignee, there isdescribed a system for comparing signature-derived signals. Included inthe correlation process is a method and means for achieving a certaindegree of rubberiness between signals derived from specimen and templatesignatures. The rubberiness is achieved by breaking the signals intofixed portions, or segments, such as halves or thirds, and thenperforming a stretching and contracting operation between correspondinghalves or thirds. The signals are not examined for any particularfeatures--the process of segmentation is blind. In other words, it isperformed independent of the nature of the signals. Where there are noexplicit landmarks in the signal, this process is very useful. However,if the signature-generated signals have prominent landmarks, and ifadvantage can be taken of their presence, the operation of stretching orcontracting the portion of specimen signals between each pair oflandmarks for subsequent correlation can be made much simpler, moreeconomical, as well as increase the system's accuracy.

OBJECTS AND SUMMARY OF THE INVENTION

An object of this invention is to provide a novel method and means forprocessing specimen signals for comparison with template signals.

Another object of this invention is the provision of a method and meansfor enabling signature derived specimen signals to be divided intosegments between prominent landmarks and stretching or contracting thesegments as required.

The foregoing and other objects of the invention are achieved bygenerating signals, as a specimen signature is being written, such as apressure force, P, representative of the force exerted by a pen,perpendicular to the plane of the paper, a left-right force, X, in theplane of the paper, and a near-far force, Y, in the plane of the paper.These signals are sampled at a suitable sampling frequency and thesamples are converted to digital sample signals, or simply digitalsamples. Prominent landmarks in the signals, such as the occurrence of"pen-ups", which take place when the pen is lifted from the paper duringthe course of the signature writing, are utilized for segmenting thetrain of digital samples, which are derived from the specimen signature.Each sequence of digital samples, occurring between pen-ups is directedto a different register. The number of pen-ups, occurring during thewriting of the specimen signature are counted and compared with thenumber of pen-ups, which occur during the writing of the templatesignature. If they are the same, then each segment of the specimensignature, which is stored in a separate register, is "normalized" orstretched or shortened, as required, to correspond to the length of thesegment between pen-ups in the template signature. Thereafter, thetemplate digital samples between segments may be compared with thestretched or reduced specimen signature digital samples by any desiredcorrelation technique.

The novel features of the invention are set forth with particularity inthe appended claims. The invention will best be understood from thefollowing description when read in conjunction with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block schematic diagram of a system for generating X, Y andP signals from the signature being written, as well as determininglandmark signals;

FIGS. 2a and 2b are block schematic diagrams of arrangements forexpanding or contracting the digital signal trains between landmarksignals in the specimen derived from the specimen signature;

FIG. 3 is a block schematic diagram indicating how the digital signaltrain derived from the specimen signature can have landmark signalsinserted therein to assist in subsequent processing;

FIG. 4 is a block schematic diagram illustrating how the processspecimen signals can then be processed through correlation circuits forcomparison with the template signals.

FIG. 5 is a multicolumn table useful in explaining several normalizationexamples;

FIG. 6 is a single block diagram of another normalization arrangement;and

FIGS. 7a and 7b are diagrams useful in explaining another aspect of theinvention.

For explanatory purposes only, the present invention will be describedin connection with an arrangement whereby several, e.g., three sequencesof signals, are generated as a signature, whether the template orspecimen, is written. These signals may be pressure and/or force signalsdesignated by P, X and Y in FIG. 1, which may be provided by a pen suchas the one described in U.S. Pat. No. 3,915,015. It should however beappreciated that more or less than three trains of signals may begenerated. Also the term "signature" is not intended to be limited tothe writing of a person's name. It is intended to include any writtenindicium. Also, as will be appreciated, the invention may be used toverify any train of signals which is segmented by landmarks with aparticular train of signals, e.g., an acoustic signal train.

The circuitry, shown in FIG. 1, may be used for recording a templatesignature as well as for recording a specimen signature, which is to becompared with the template signature for verification. A pen 10, andsignal generating circuit 12, which are associated therewith, areassumed to produce X, Y and P trains of signals, which are respectivelyrepresentative of the direction forces and pressure. These are assumedto be analog signals which are respectively applied to three samplercircuits, respectively 14, 16 and 18. These sampler circuits, areperiodically enabled, to sample the signals applied to their inputs, inresponse to pulses, received from a free-running oscillator, as will besubsequently described. The sampled signals or samples, which constitutethe outputs of the respective sampler circuits 14, 16 and 18 arerespectively applied to analog to digital converting circuits 20, 22 and24 (A/D), to provide digitized samples. The outputs of the three A/Dcircuits are transferred to a plurality of registers, in a manner whichwill be subsequently described herein.

The P signal, provided by the generating circuit 12, is applied to athreshold circuit 26. The threshold circuit measures the amplitude ofthe P signal against a pre-established reference potential, providedfrom a reference potential source 28. If the P signal exceeds thereference potential signal, the threshold circuit 26 applies an outputto a threshold pulse generator 30, which produces a signal pulse inresponse thereto. The pulse generator output sets a flip flop 32 and isalso applied to a gate 34, which receives an enabling input from theset(s) output of the flip flop 32. The output of the gate 34 is appliedto a pen-up counter 36.

As will be subsequently described, flip flop 32 remains set until theend of a signature writing. Each time the pen 10 is lifted from thepaper and, within a predetermined interval, the pen is again applied tothe paper, pulse generator 30 will provide an additional pulse. Thus, bycounting the number of pulse outputs from pulse generator 30 during asignature writing, one can determine how many times the pen was liftedduring the signature writing. Accordingly, at the end of a signaturewriting, the pen-up counter 36 will contain a total count equal to thenumber of pen-ups that occurred during the signature writing.

The set output of flip flop 32, together with the output of an inverter41, enables a gate 38. The output of a free-running oscillator 39, isthen applied through gate 38 to a sample counter 40, and also to thesampling circuits 14, 16 and 18, whereby they can sample the respectiveX, Y and P signals.

The P output of the generating circuit 12 is also applied to an inverter42, the output from which is applied to two And gates, respectively 44and 46. Gate 44 is enabled when flip flop 32 is transferred to its setcondition. Accordingly, when this occurs the output of the inverter 42,in response to a P signal, is applied to a pulse generator 47. The pulsegenerator 47 generates a pulse which is applied to a time delay circuit48. Should an enabling output from the inverter 42 still be present atthe end of the delay, provided by time delay circuit 48, And gate 46provides an output which can be considered as an "end of signature"output. This is used to reset the flip flop 32. The time delay 48establishes an interval between its input and output, which issufficiently long, so that pen-ups, such as those occurring when movingbetween words, or characters or partial characters or when crossing t'sor dotting i's will transpire before that interval. Only when the penhas been lifted for a reasonably long time, to indicate that thesignature writing has been terminated, is an output received from thetime delay circuit 48.

It should be noted that the inverter 42 will provide an output each timethe pen is lifted from the paper, whereby gates 44 and 46 will have asignal applied thereto. In the presence of an output from And gate 46,flip flop 32 is reset whereby And gates 34 and 38 are no longer enabled.

The output of the sample counter 40 is applied to as many sets of gatesas there are signature segments which will be handled by the system.Three sets of gates, respectively 50A, 50B, 50N, are shown by way ofexample. The gates are successively enabled to transfer the counts ofthe sampler counter 40, applied to their inputs, respectively to bufferstorage circuits respectively 52A, 52B, 52N (FIG. 2b) in response tooutputs from respective And gates 53A, 53B, 53N. These And gates aresuccessively enabled to provide outputs in response to successive counts0,1,2,n from pen-up counter 36 and the output from inverter 42, whichoccurs whenever pen 10 is lifted. And gate 53A also requires a setoutput from flip flop 32. An Or gate 55 receives an output from each oneof the And gates 53A, 53B, 53N and applies this output to the inverter41 and to a delay circuit 57. The output of the delay circuit resets thesample counter. Inverter 41, in the presence of the input from the Orgate 55, inhibits And gate 38 from passing further outputs from theoscillator 39.

From the foregoing it should be understood that the sample counter 40counts the number of samples taken of a signature between pen-ups. Oncewriting has commenced, when the pen is first lifted from the paper,inverter 42 will provide an output signal and the pen-up counter 36 willstill be in its zero state. Gates 50A are enabled to transfer the countof sample counter 40 to buffer store 52A, and after a delay by delaycircuit 57, long enough to permit this count transfer to take place, thesample counter is reset. When the writer again applies pen 10 to thepaper or any other writing medium, the inverter output drops, And gate38 is enabled to pass pulses from oscillator 39, and the sample counter40 starts counting the number of samples taken of the signature untilthe next pen-up occurs. At this time, the pen-up counter will contain a1 count. And gate 53B is enabled and the count in the sample counter istransferred to buffer store 52B. The sample counter is then reset andwill start counting the number of samples in the next signature segmentas soon as the pen 10 is applied for writing again. The foregoingsequence of transfer of the number of samples taken for each signaturesegment to a separate buffer store occurs until the signature iscompleted.

The total count of the pen-up counter 36 is applied to a set of gates 54which are enabled to transfer this count to a comparator 56 (FIG. 2a)and to a buffer store 139 (FIG. 2b). The individual counts of the pen-upcounter, besides being applied to And gates 53A, 53B, 53N as described,are applied to And gates 60, 66, 68, 70, 76 and 78, as will be describedsubsequently.

Referring now to FIGS. 2a and 2b, there may be seen a block schematicdiagram of circuits for processing the digital samples provided by theoutputs of the A/D circuits respectively 20, 22 and 24. Because theprocessing circuits required are identical for each train of digitalsamples, only one set of these circuits, is shown. FIGS. 2a and 2b, withexceptions which will be noted, are required for processing the digitalsamples from each one of the outputs of the A/D circuits.

Referring now to FIG. 2a, in response to the zero count output of thepen-up counter 36 and the set output of flip flop 32, an And gate 60 isenabled to permit the output from the A/D converter 20, which are the Xdigital samples, to be entered into a shift register 62. Pulses forshifting these samples into the register 62 are generated by an "inshift pulser" 64. The in shift pulser is a pulse shaping circuit, whichis enabled to produce shift pulses in response to the output of an Andgate 66. This And gate is enabled by the zero count output from counter36 and the set output of flip flop 32, and serves to apply the samplepulse outputs from And gate 38 in FIG. 1, to the in shift pulser.

When the pen-up counter reaches its first count (count #1) this isapplied to And gates 68 and 70. And gate 68 is thus enabled to transferthe digital samples from the A/D converter 20 to a second register 72.The register is enabled to enter these X samples in response to shiftpulses, received from an in shift pulser 74. The in shift pulserreceives the sample pulses from the output of And gate 38 through Andgate 70.

It should be appreciated that each pen-up signal enables a succeedingsegment of X digital samples, extending until the next pen-up signal, tobe entered into a separate register, whereby the segments betweenpen-ups are separated. The nth count from counter 36 enables two Andgates 76 and 78, whereby the nth segment of the samples from A/D circuit20 is entered into a register (60+n) in response to shift pulsesreceived from the in shift pulser 82. In shift pulser 82 receives thesample pulses from And gate 38 through an And gate 78.

A template memory 84, will have previously stored therein digitalsamples of the X segments of the template signature. These will bestored as separated segments and associated with each segment there willbe a number indicative of the total number of samples that were takenduring the writing of that segment. Another number will be stored forthe total signature which will be the number of pen-ups that occurredduring the writing of the template signature. The same circuit as isshown in FIG. 1 may be used for generating this data.

The template memory 84 is addressed by a memory address system 86, towhich is applied the address of the template signature and associatednumbers, prior to or during the writing of the specimen signature. Suchaddressing may be done in any of the well-known ways, such as byapplying an identification number to the memory system, either by meansof a keyboard or a card, which is read. Techniques for doing this, thatis, for storing data in a memory and for addressing the memory forread-out of that data, is old and well-known by now, and therefore, itwill not be described in detail here. Suffice to say that at this timethe only data that is required from the template memory is the number ofpen-ups which is read into the comparator 56, and the number of samplesin successive segments of the template signature which are successivelyentered into respective template sample buffer circuits 88A, 88B, 88N(FIG. 2b), for temporary storage therein. The indicated informationshould be non-destructively read out of the memory.

It should be appreciated that buffer stores 88A, 88B, 88N correspond tobuffer stores 52A, 52B, 52N in which the number of samples taken ofcorresponding segments of the specimen signatures are stored. The endsignature signal of And gate 46 is applied to an Or gate 90, (FIG. 2b).The output of the Or gate 90 is applied to a state counter 92 causing itto go into a one-count state. The one-count state of state counter 92 isapplied to the comparator 56 to enable it to compare the total number ofpen-up signals which occurred in writing the template signature with thetotal number of pen-up signals occurring during the writing of thespecimen signature. If the pen-up counts are equal the comparator willproduce a "true" output (T). If the two pen-up counts are not equal, itwill produce a "false" (F) output.

Several alternatives may be pursued in the event that a "false" outputsignal occurs. This may be displayed by any suitable display arrangementand the specimen signature may be declared as a false signature.Alternatively, this may be indicated and another specimen signature maybe called for. Alternatively, the segments of the samples of thespecimen signature in the register 62, 72 . . . (60+n) may be sequencedin the order in which they were generated, then applied to a specimenmemory 94, FIG. 2a to be processed in the manner of currently knownrubbery correlation processing.

The segments in the registers 62, 72 and (60+n) may be transferred tothe specimen memory by applying the F signal output of the comparator 56and the one-count signal of the state counter 92 to an And gate 96,(FIG. 2b). And gate 96 output is used to enable an oscillator 98 tostart generating pulses. These are applied through an Or gate 99 to Andgates 100, 102 and (100+n). These And gates are successively enabled inresponse to the count outputs of a read-out counter 110. The read-outcounter is enabled to assume its one-count state in response to theoutput from an Or gate 112. Or gate 112 can produce an output inresponse to the output from an And gate 114, which is produced inresponse to an F input, and a one input from counter 92.

In the one count state read-out counter 110 enables the And gate 100 toapply the oscillator pulses received from oscillator 98 to an out shiftpulser circuit 116, (FIG. 2a). This is a pulse shaping circuit whoseoutput is used to shift out the digital samples in shift register 62through the same end of the register as the one through which they werereceived. These digital samples are applied to an Or gate 118 (FIG. 2a),the output from which is applied to an And gate 120. And gate 120 isenabled in response to an F output from the comparator, whereby it willtransfer the digital samples from register 62 into the specimen memory94.

When register 62 has shifted out all of its digital samples, they willbe followed by a zero. This is sensed by a zero sensor 122. It should benoted that when a digital sample has a zero value it is represented by adigit. This is done to enable the zero sensor to distinguish between azero value digital sample and a zero which occurs after all the digitalsamples in the register have been shifted out. The output from the zerosensor 122 is applied to Or gates 124 and 141 (FIG. 2b). The output ofthe Or gate 124 is applied to the Or gate 112 which produces an outputwhich is applied to the read-out counter 110 whereby its count isadvanced to its second count state, 2.

Upon reaching the second count state, read-out counter 110 enables Andgate 102 whereby pulses are applied to an out shift pulser 130. Theoutshift pulser circuit 130, enables register 72 to shift out thedigital samples in a reverse order in which they were received. Thesedigital samples are applied to the Or gate 118 and then through And gate120 to the specimen memory 94, to be added to the digital samplesreceived from the register 62. Another zero sensor 132 senses the zerofollowing the last digital sample coming out of register 72, and appliesits output to the Or gates 124 and 141, whereby the read-out counter 110is advanced to its next count. In the manner described, read-out counter110 enables the registers to shift out their contents. The next to thelast count of the read-out counter enables And gate 100+n to applypulses to out shift pulser 136. As a result, out shift pulser 136 shiftsout the digital samples in register (60+n) to the Or gate 118 and thenthrough And gate 120 they are stored in memory 94 following thepreviously stored digital samples. Zero sensor 138 applies an output toOr gates 124 and 141 and then through And gate 126 advances the read-outcounter 110 to its nth count or last count. This last count is used toreset all circuits that require resetting.

In the event that less than all of the registers 62, 72 and (60+n) areused, which may happen, then provision must be made to determine whenthe last digital sample has been shifted out of the registers. Toaccomplish this, the total pen-up count of counter 36 is transferred,when gates 54 are enabled, into the buffer store 139, (FIG. 2b). Itsoutput is applied to a subtractor circuit 140 which is enabled inresponse to the output of an Or gate 143. Or gate 143 provides an outputin response to either the one or the two count outputs of the statecounter 92. Subtractor circuit 140 will subtract, from the total pen-upcount, the successive outputs of zero sensors 122, 132, and 138. Thezero sensor outpus are collected by an Or gate 141, whose output isapplied to subtractor 140. The output of subtractor circuit 140 isapplied to an inverter 142. When subtractor circuit 140 output reacheszero, inverter circuit 142 provides an output which is applied to threeAnd gates respectively 144, 184, 222. And gate 144, in the furtherpresence of an F input, an output from one of the zero sensors derivedfrom the output of Or gate 141, and a No. 1 count from the statecounter, provides an output which is used to reset counters 110 and 92and all other circuits used thus far, to their starting state.Thereafter, the specimen signature digital samples stored in the memory94 and the template signature digital samples stored in memory 84 may beprocessed for correlation in the manner described, for example in thepreviously mentioned application Ser. No. 681,118 now U.S. Pat. No.4,040,012. The reason one more zero sensor output is required is becausewhen a signature is finished no pen-down signal after a pen-up signaloccurs, which is required to actuate the pen-up signal counter. Thus,the pen-up counter total count is one less than the number of segmentsand one less than the number of registers storing those segments. Whenthe zero sensor of the last register holding a segment produces anoutput, And gate 144 produces a reset output.

When the output of comparator 56 is true (T), this T output is appliedto the Or gate 90 which drives the state counter 92 to its one countstate. The one count of this counter and the T output of the comparatorcircuit 56 are used to "normalize" the contents of registers 62, 72 and(60+n). By that is meant that their contents are expanded or decreaseduntil the number of digital samples in each segment equals the number ofdigital samples in the corresponding segment of the template memory.This is accomplished by respectively reading the digital samplesconstituting the specimen signature segments out of the respectiveregisters 62, 72 and (60+n) at rates determined by the number of digitalsamples taken in each of the respective segments. The outputs of each ofthe registers, which are converted to analog signals are then sampled ata rate determined by the number of samples taken of the correspondingspecimen segment. These samples are digitized and then entered intonormalizing registers respectively 152, 154, (152+n). It will berecalled that the numbers representing the number of samples for eachsegment of the specimen memory are stored in the respective bufferstores 52A, 52B, 52N, and the digital numbers representing the numbersof samples taken from each corresponding segment of the templatesignature are stored in the respective template buffers 88A, 88B, 88N.(FIG. 2B)

Buffer stores 52A,52B,52C have their outputs connected respectively torespective gates 157A,157B,157N. These gates are sequentially enabled,in response to the 1, 2 . . . N counts of counter 110, to apply thebuffer store outputs to an Or gate 158A. The Or gate output constitutesone input to a divider 158B.

Template buffer stores 88A, 88B, 88N respectively are connected torespective gates 161A, 161B, 161N. These gates are sequentially enabledby the 1, 2 . . . N output of a counter 166. The outputs from thesegates are applied to an Or gate 158C, whose output comprises the secondinput to divider 158B. The divider divides the number received from Orgate 158A by the number received from Or gate 158C. The output of thedivider is applied to a multiplier 158D to be multiplied by a voltagefrom a voltage source 158E.

An oscillator 160, when enabled as will be hereinafter described, willcause the registers 152, 154, 152+n to shift in the signals beingreceived from the respective registers 62,72,62+n. The voltagecontrolled oscillator 158, when enabled, causes the respective registers62, 72,62+n to shift out their contents at a rate determined by theoscillation rate of the voltage controlled oscillator, which isdetermined by the voltage received from the multiplier 158D. Were thefixed voltage from source 158E applied to voltage controlled oscillator158, it would oscillate at the same frequency as oscillator 160. Bydividing the number of specimen samples, by the number of templatesamples and multiplying the result by the fixed voltage, a voltage isobtained, which, when applied to the voltage controlled oscillator 158results in the registers 152,154,152+n deriving from registers62,72,62+n the same number of samples as there are in the templatesegments.

For example, assume that there are 10 template samples in a segment and15 specimen samples in a corresponding specimen segment. Assume that thefixed voltage is one volt. Then, the voltage controlled oscillator 158will provide an output frequency which is 11/2 times the frequency usedto drive the normalizing register. Thus when, for example, register 152and 62 are simultaneously operated and register 62 shifts out itscontents at 11/2 times the frequency which register 152 shifts in anyinput, register 152 will only ingest 10 specimen samples from all 15specimen samples and the specimen segment is then normalized.

Voltage controlled oscillator 158 is enabled to oscillate in response toa one count of state counter 92 and a T signal which are applied to Andgate 159. Oscillator 160 is enabled to oscillate also in response to aone count of state counter 92, which is applied to an And gate 167,whose output is applied to an Or gate 168. The output of Or gate 168enables oscillator 160 to oscillate.

The output of the voltage controlled oscillator 158 is applied to the Orgate 99. The output of the Or gate 99 is applied to the respective Andgates 100, 102 and (100+n). These And gates are sequentially enabled inresponse to the count outputs of the read-out counter 110.

The T output of the comparator 56, is applied to a delay circuit 163(FIG. 2B). The delay output from delay circuit 163 is applied to the Orgate 112 whereupon read-out counter 110 is advanced to its one-countstate. The delay is to enable the oscillators 158 and 160 to attaintheir steady oscillation states after being enabled. And gate 100applies the oscillations received from the voltage-controlled oscillator158 to the out shift pulser 116. The register 62 now commences totransfer out the digital samples received from the beginning of thespecimen signature up until the first pen-down signal occurrence.

The output of the Or gate 112 (FIG. 2B) is also applied to an And gate165, which, in the presence of a T signal applies the signals receivedto an Or gate 164. The output from Or gate 164 advances the count of aread-in-out counter 166 to its one state. Thereby, in the presence of aT signal, counter 166 advances together with counter 110. It may havethe same count capacity as counter 110, and also has, for the purpose ofenabling data read-in to the normalizing registers, an And gate assignedto each count output, respectively 170,172,(170+n). These respective Andgates receives as a second input, oscillations from oscillator 160.These And gates have their outputs respectively connected to in shiftpulser circuits respectively 180,182,(182+n). These in shift pulsercircuits will sequentially receive the oscillations from the oscillator160 through the respective And gates 170,172 and (170+n) as theread-in-out counter has its count advanced.

The output of register 62 is applied to a digital to analog converter62A. The output of the digital to analog converter is applied to asample and hold circuit 62B which provides an output which holds thelast output of the digital to analog converter 62A. A gate 62C isenabled to sample the output of the sample and hold circuit each time apulse is received from the oscillator 160. The gate 62C output isapplied to an analog to digital circuit 62D, which converts the analogsignal to digital form. The pulse from oscillator 160 is also applied tothe in shift pulser circuit 180 whereby the digital output of the analogto digital converter 62D is entered into shift register 152.

In view of the fact that the voltage controled oscillator 158 and outshift pulser 116 cause shift out of the stored samples of a specimensignature segment at a rate which is proportionately increased ordecreased relative to the rate at which oscillator 160 and in shiftpulser enable sampling of this output by the normalizing register, whichproportional increase or decrease is determined by the number of samplesin a specimen segment divided by the number of samples in acorresponding template segment, the normalizing register will contain,at the time that the transfer from register 62 is terminated at pen-uptime, the same number of samples of the specimen signature segment aswere contained in the corresponding template signature segment, andfurther these samples are derived from locations which are spacedequally apart from one another over the entire specimen signaturesegment. Thus the specimen signature segment has been normalized, i.e.expanded or contracted to the same size as the template signaturesegment. The circuits 62A, 62B, 62C and 62D serve to provide aninterpolation function when the frequencies at which registers 62 and152 are shifted are not integrally related.

When zero sensor 122 senses the end of the segment stored in register62, it applies an output to Or gate 124. The output of this Or gate isapplied, through Or gate 112 to advance counter 100 to its second countstate, and the output from Or gate 112 is applied, through And gate 165and Or gate 164, to drive the counter 166 to its second count state.

The second count states of counters 110 and 166 besides respectivelyenabling And gates 102 and 172, enables gates 157B and 161B toresepctively apply the contents of buffer stores 52B and 88B to dividercircuit 158B through respective Or gates 158A and 158C. Out shift pulser130 causes register 72 to shift out its contents at a rate determined bythe output of voltage controlled oscillator 158. These are transferredto normalizing register 154 through analog to digital circuit 72A,sample and hold circuit 72B, gate 72C and analog to digital circuit 72D,at a rate determined by the output of oscillator 160. Thus the operationof the circuits on the digital samples of the second segment of thespecimen memory is the same as described for the digital samples of thefirst segment, which results in storing a normalized second specimen inthe normalizing register 154. Zero sensor 132 produces an output at theend of the transfer out from register 72 of the second segment. Thisoutput advances counters 110 and 166 to their third count.

From the foregoing it should be clear how each segment of the specimensignature is normalized in turn and transferred to a normalizingregister.

The subtractor circuit 140 and the inverter circuit 142 function in themanner previously described to subtract from the number of pen-downs,outputs from the respective zero sensor circuits 122, 132 and 138,whereby when these are equal, the inverter 142 is enabled to provide anoutput. The inverter output is applied to an And gate 184. This And gateis enabled in response to the output of the last zero sensor, a T input,and a one input from state counter 92. The output of this And gate isapplied to the Or gate 90 whereby the state counter 92 is advanced toits number two-count state.

The two-count state of the state counter enables the transfer out of thecontents of the normalizing registers, in the sequence received, intothe specimen memory. The two-count is also applied to Or gate 143,whereby subtractor 140 is enabled to perform another subtraction.

The output of the And gate 184 is used to reset the read-in-out counter166 to its first count state. Three And gates respectively 192, 194 and(192+n) are respectively enabled in response to the first, second, nth,outputs of the read-in-out counter 166. When they are enabled, they canpass oscillations from the oscillator 160. This oscillator is enabled bythe two-count output of the state counter 92, which is applied via Orgate 167.

The outputs of And gates 192, 194 and (192+n) respectively, are appliedto out shift pulsers 200, 202, (200+n). The normalizing registers will,in response to the out shift pulser signals sequentially shift out theircontents into the specimen memory. Their outputs are applied to an Orgate 204 the output from which is applied to an And gate 206. This Andgate is enabled in the presence of a T input as well as a two count fromthe state counter. The output of the And gate 206 is thereafter appliedto the specimen memory 94, and stored therein. Such storage may bespaced or segmented in accordance with the segments of the specimensignal indicated in response to the pen-up signals. The memory may beinstructed to do this in response to the count outputs from theread-in-out counter 166, which will occur upon the end of the outputfrom each of the respective normalizing registers.

The read-in-out counter is now sequenced in a similar manner to thepreviously used sequencing technique. A zero sensor 210 is connected tothe output of normalizing register 152. A zero sensor 212 is connectedto the output of the normalizing register 154. A zero sensor (210+n) isconnected to the output of normalizing register 152+n. The outputs ofthese three zero sensor circuits, when they sense a zero, which occurswhen the last digital sample has been transferred out of the respectivenormalizing registers, are applied to the Or gate 164 the output fromwhich advances counter 166.

The subtractor circuit 140, and the inverter circuit 142 serve the samefunction as they did previously, to indicate when the contents of all ofthe normalizing registers have been transferred to the specimen memory.This is achieved by applying the outputs of the respective zero sensors210, 212, (210+n) to an Or gate 220. The total of the outputs of this Orgate is subtracted from the total number of pen-up signals which ismaintained in the subtractor circuit 140 by the output of buffer store139. When the subtractor circuit output reaches zero again, the inverter142 provides another output to an And gate 222. This And gate is enabledby a T input, by a last zero sensor output, and the two-count output ofthe state counter, whereby its output can be used to reset the systemfor the purposes of being used again.

If it is desired to insert special separation signals at the locationsof the occurrences of pen-ups in the sequence of digital samples beingsupplied to the specimen memory 94, then this can be done by the circuitarrangement shown in FIG. 3. The outputs from the zero sensors 210, 212,and (210+n) are applied to an Or gate 230. Each time an output isobtained from this Or gate a pen-up signal generator 232 applies aspecial pen-up signal to an Or gate 234. The other inputs to the Or gate234 constitute the successive outputs from the normalizing registers152, 154 and 152+n. The output of the Or gate 234 is then entered intothe specimen memory. The indicated pen-up signals may be signalsindicative of the beginning and the end of the particular specimensignature signals which may be used in a system, such as is described inthe previously indicated applications, Ser. No. 68,118.

As shown in FIG. 4, the specimen memory system 94 and the templatememory system 84 may now be connected to correlation circuits 236 forthe purposes of comparison. Since the specimen signature segments havebeen stretched or reduced in length, as the case may be so that they arenow equal to the template signature segments, and since both signatureshave their segments aligned, the processing of these signatures for thepurposes of the correlation comparison, performed by the correlationcircuits 236 is very simple. All that is required is direct correlation,or a translation, or, a shifting of the signals of one signature may bemade with respect to the other for the purposes of searching for a bestfit. This may be done by recording the signals on two tapes andsuccessively displacing these tapes, or may be done directly from thedigital signals in the manner described in detail in the indicatedapplication Ser. No. 68,118. Alternatively the correlation processingmay be done using any of the other, known numerous correlationtechniques, such as subtracting each digital sample of the specimensignature from the corresponding digital sample of the templatesignature segments, and adding the absolute value of each suchdifference, etc. In any event, the correlation circuit outputs willprovide a true or false indication to an indicator 238.

The processing of the X digital samples which has been described andshown in FIGS. 2A and 2B is also carried out with the Y and P signals.This may be done simultaneously with the X signal processing byduplicating the circuits of FIGS. 2A and 2B for Y and P, or the Y and Pdigital samples may be stored and then successively processed after Xdigital sample processing, by the one set of circuits.

The processing of the template signature signals only requires theirbreakup into segments between landmarks, which is done by transferringthe segments into registers 62, 72 and (60+n), counting the samples ineach segment, and counting the number of landmarks, respectively handledby counters 40 and 36. This data is then transferred into the templatememory at a predetermined address, to be available for read out whenrequired for correlation. The techniques for transfer into memory areknown quite well and thus need not be described here.

By the process described, of normalizing segments of a specimensignature signal between landmarks, which correspond to landmarksbetween segments of the template signature signal, the process ofcorrelation is made simpler. While "pen-ups" have been used aslandmarks, other landmarks may also be used, without departing from thescope and spirit of this invention.

The particular sample normalization process and means were describedherebefore for explanatory purposes only, without intending to limit theinvention thereto. It should be apparent that other arrangements may beemployed to accomplish the sample normalization. In general, thenormalization can be viewed as a process, whereby the number of samplesin a specimen segment is made equal to the number of samples in thecorresponding template segment, with the values of the samples in thenormalized specimen segment being a function of the sample values in theoriginal specimen segment.

This aspect may be summarized in connection with several examples,presented numerically in FIG. 5. Therein columns 1-4 from left to rightrepresent one example, and columns 5-8 a second example. Let it beassumed that a template segment contains 11 samples (cl. 1) and that thecorresponding specimen segment, before normalization, contains 16samples (cl. 2) of values, as shown in column 3. By the normalization,the number of samples for the specimen segment is reduced to equal thatof the template segment, i.e., 11 (cl. 4). The values however of these11 samples are selected, based on the original values in the specimensegment before normalization. In the particular example, the values ofthe first and last (11th) normalized samples are made equal to thevalues of the first and last (16th) specimen samples of thenon-normalized segment, e.g., 2 and 8. The values of the other 9 samplesin the normalized segment depend on the values of the other 14 samplesin the non-normalized segment.

Columns 5-8 are used to represent a normalization example, wherein thetemplate has 16 samples (cl. 5) and the non-normalized specimen segmenthas only 11 samples (cl. 6), of values as shown in column 7. Thenormalized specimen segment is increased to 16 samples, with values asshown in column 8, based on the values of the 11 samples of thenon-normalized specimen segment.

In the particular example, instead of the second sample of value 4 inthe non-normalized segment, two samples are inserted in the normalizedsegment of values, which depend on the value 4 of the second sample andthe values of 2 and 5 of the adjacent samples. In the example the valueof the second sample in the normalized segment is (4+2)/2=3, while thatof the third sample is (4+5)/2=4.5. Thus the value 4 of the sample to bereplaced and the values 2 and 5 of the adjacent samples are used toprovide the values of 3 and 4.5 for the samples in the normalizedsegment.

Since the number of samples in a template segment and the correspondingspecimen segment are available, such as in buffer stores 88A and 52A(FIG. 2b) and the values of the non-normalized specimen segment are in aregister, like 62, it should be appreciated that such normalization canbe accomplished by those familiar with the art. For example anarrangement, as shown in FIG. 6 may be used. Therein elements like thosepreviously described are designated by like numerals. In FIG. 6registers 62 and 152 are shown as memories with storage bytes or cellsS1-Sn.

For the particular example, represented in columns 1-4 in FIG. 5, basedon the number of template segment samples of 11 in buffer store 88A andthe number of specimen segment samples of 16 in buffer store 52A,digital processor 300 transfers the value 8 in S16 of register 62 to S11of normalizing register 152, while the value 2 in S1 of 62 istransferred to S1 of 152. The other 14 values in S2-S15 of 62 are thenprocessed by processor 300 to form 9 values which are loaded into S2-S10of 152. Once the normalization is completed it is transferred to thespecimen memory system 94 (See FIG. 2a). After the normalization of onesegment is completed the processor 300 may be used to normalize the nextsegment. Clearly, if desired with a plurality of processors 300normalization of a plurality of segments may be performed in parallel.

Herebefore, when discussing the case wherein the number of landmarks inthe template and specimen signatures is not the same, i.e. comparator 56(see FIG. 2a) produces a false (F) output, several alternatives, whichmay be followed, were presented. It should be appreciated that in such acase, i.e. unequal number of landmarks, other alternatives may befollowed. For example, the template memory 84 may store severaldifferent templates for signatures for the same person so that thespecimen signature may be compared with each of them.

Another possible alternative may be followed when the difference in thenumber of landmarks in the two signatures (specimen and template) issmall, e.g., one. In such a case the difference of one may be ignoredand the segments normalized as herebefore explained. This aspect of theinvention may best be described in connection with FIGS. 7a and 7b,which are assumed to represent samples and segments of a template andspecimen signature, respectively.

The template signature is assumed to include four segments G1-G4,separated by three landmarks L1-L3 and an end of signature signal 310.The short vertical lines are assumed to represent samples. On the otherhand, the specimen signature (FIG. 7b) is assumed to consist of fivesegments G1-G5 separated by four landmarks L1-L4 and the end ofsignature signal 310. Clearly in such a case the number of landmarks isnot the same. Thus, the comparator 56 would produce a false signal.

In accordance with this aspect of the invention if the landmark numberdifference is small, e.g. one, the number of samples in each segment ofthe signature with the larger number of landmarks is checked. If asegment is found with a very small number of samples, one of thelandmarks, defining the limits of that segment, is ignored. The smallnumber of samples of the short segment may be discarded or regarded asbeing part of the preceeding or the following segment. A small number ofsamples in a segment would occur when a person raises the pen to dot ani or cross a t.

In the particular example the specimen signature has one extra landmark.Thus the number of samples in each segment is checked. Segment G3 isassumed to include 2 samples. Thus either landmark L2 or L3 may beignored. The two samples in segment G3 may be ignored or added to thoseof segment G2, in which case L2 is discarded, or to G3 of the specimensignature. To which segment the sample is added may be determined bycomparing the number of samples in the corresponding segment of theother signature, such as the template, so that corresponding segments ofthe two signatures have closer numbers of samples.

In the particular example the two samples of G3 of the specimensignature may be added to G2 so that the number of samples is closer tothat of G2 of the template signature or to the samples of G3 of thespecimen signature so that the total sample number is closer to thesample number in G3 of the template signature. Such a procedure wouldminimize the likelihood of regarding a signature as false, merelybecause the signer raised the pen one extra time for a very shortwriting period, e.g., raising the pen to dot an i.

It should be appreciated that the invention is not intended to belimited to signature verification only. That is to determine whether aspecimen signature matches one or more specific template signatureswritten by the specimen signature writer. The invention may be used forrecognition purposes as well. For example, the specimen signature may becompared with each of the template signatures which may be associatedwith different signers or written indicia to recognize, i.e., identifythe written signature. For example, assuming that the specimen signatureis a chinese character it may be compared with each of many templates ofchinese characters to recognize or identify the written character whenit best correlates with one of the chinese characters' templates. Theinvention is highly suitable for such recognition since chinesecharacters are formed by several and in some cases many separatestrokes, thus containing many landmarks. However as previously pointedout the invention may be used to great advantage to verify or recognizeany signal train characterised by landmarks. As used herein the termverification is intended to include recognition as well.

Although particular embodiments of the invention have been described andillustrated herein, it is recognized that modifications and variationsmay readily occur to those skilled in the art and consequently, it isintended that the claims be interpreted to cover such modifications andequivalents.

The embodiments of the invention in which an exclusive property orprivilege is claimed are defined as follows:
 1. In a system wherein afirst train of signals having landmarks is to be correlated with asecond train of signals having analogous landmarks, the method ofsegmenting each train of signals into segments and normalizingcorresponding segments, the steps comprising:segmenting the first trainof signals into segments, including a first segment which includes thesignals from the start of said first train to the first landmark, and alast segment which includes the signals from the last landmark to theend of said first train; storing the signals in each segment of saidfirst train; counting the number of landmarks in said first train;segmenting the second train of signals into segments including a firstsegment which includes the signals from the start of said second trainto the first landmark thereof, and a last segment which includes thesignals from the last landmark to the end of said second train; storingthe signals in each segment of said second train; counting the number oflandmarks in said second train; comparing the total number of countedlandmarks in said first train with those in the second train andproducing a signal indicative whether the numbers are equal or not; andwhen said signal indicates that the two numbers are equal, normalizingeach segment of said second train by varying the number of signalstherein to equal the number of signals in the corresponding segment ofthe first train, with the values of the signals in the normalizedsegment being a function of their values in the correspondingnon-normalized segment of the second train.
 2. A system as described inclaim 1 wherein the signals in each train are sampled at a selected rateto form samples which are stored for each segment, and wherein thenormalization is performed by normalizing each segment of the secondtrain by varying the number of samples in the segment to equal thenumber of samples in the corresponding segment of the first train withthe values of the samples in the normalized segment being a function oftheir values in the segment before normalization.
 3. In a system asdescribed in claim 2 wherein when comparing the number of landmarks inthe two trains the difference between the landmarks' numbers is onlyone, the method further includes the steps of determining whether any ofthe segments of the train with the greater number of landmarks containsa segment with a number of samples which does not exceed a preselectednumber, and when such a segment is determined to be present, deletingone of the landmarks, defining one of the segment's limits, prior tonormalizing the segments of said second train.
 4. In a system asdescribed in claim 3 wherein the signals of said first train of signalsrepresent force signals, produced along a selected axis as a firstindicium is written, and the signals of said second train representforce signals produced along said selected axis as a second indicium issubsequently written.
 5. A system as described in claim 1 wherein thesignals of said first train of signals represent force signals, producedalong a selected axis as a first indicium is written and the signals ofsaid second train represent force signals, produced along said selectedaxis as a second indicium is subsequently written.
 6. A system asdescribed in claim 5 wherein the signals in each train are sampled at aselected rate to form samples which are stored for each segment, andwherein the normalization is performed by normalizing each segment ofthe second train by varying the number of samples in the segment toequal the number of samples in the corresponding segment of the firsttrain with the values of the samples in the normalized segment being afunction of their values in the segment before normalization.
 7. In amethod of verifying the correlation between a written specimen indiciumwith a previously written template indicium wherein both indicia havelandmarks as there are written, the steps comprising:for the templateindicium, generating a first set of n trains of signals as the templateindicium is written, n being an integer not less than one, where thesignals in the trains represent force signals along n selected axes asthe template indicium is written; sampling the signals in each of said ntrains at a selected rate to provide signal samples; in each traindetecting the landmarks therein and segmenting the samples thereof intosample segments; for each train producing a number which equals thenumber of detected landmarks in the train; for the specimen indicium;generating a second set of n trains where the signals in the n trainsrepresent force signals along said n selected axes, each train in saidsecond set having a corresponding train in said first set for forcesignals along the same axis; sampling the signals in each train of saidsecond set at said selected rate to provide signal samples; in eachtrain of the second set detecting the landmarks therein and segmentingthe samples into sample segments, for each train in said second setproviding a number equaling the number of detected landmarks in thetrain, comparing the numbers of landmarks in at least two correspondingtrains in the two sets and when they are equal; normalizing each segmentof the train in the second set with respect to the corresponding segmentof the corresponding train in the first set, the normalizationcomprising the step of varying the number of samples in each segment toequal the number of samples in the corresponding segment, the values ofthe samples in the normalized segment being a function of the values ofthe samples in the segment before normalization.
 8. A method asdescribed in claim 7 wherein n>1.
 9. A method as described in claim 7wherein each landmark represents a break in the continuous writing ofthe indicium.
 10. A method as described in claim 7 wherein each indiciumis a written signature of a signor and wherein each landmark representsa break in the continuous writing of the indicium.
 11. A method asdescribed in claim 10 wherein n>1.
 12. In a system wherein a templateindicium, which is generated is to be correlated with a subsequentlygenerated specimen indicium, and said generated indicia have naturallandmark, occurring therealong as they are being generated, a system fornormalizing as well as segmenting the lengths of the indicia betweenlandmark comprising:for said template indicium; means for generating atrain of samples, a variable of said template indicium as it isgenerated; means for detecting each of natural landmark in said train asthe template indicium is being generated and producing a landmarksignal, means for adding the number of landmark signals to produce alandmark total, means for separating the samples in said train inresponse to the landmark signals, into segments, each segment comprisingthe samples generated between landmark signals; means for counting thetotal number of samples in each segment; for each specimen indicium;means for generating a train of samples representing a variable of saidspecimen indicium as it is generated; means for detecting each naturallandmark in said train as the specimen indicium is being generated andproducing a landmark signal; means for adding the number of landmarksignals to produce a landmark total; means for separating samples insaid train, in response to the landmark signals, into segments, eachsegment comprising the samples generated between landmark signals; meansfor counting the total number of samples in each segment; means forcomparing the template indicium train landmark total with the specimentrain landmark total and producing a true signal if they are equal; andmeans responsive to said true signal, for altering the number of samplesin successive segments of the train of said specimen indicium until theyequal the number of samples in corresponding successive segments of thetrain of said template indicium.